AN ENERGY-EFFICIENT FAULT-TOLERANT METHOD IN NONVOLATILE MAIN MEMORY

Abstract

An energy- and area-efficient solution for tolerating the stuck-at faults induced by an endurance problem in
secure-resistive main memory. A large number of memory locations with stuck-at faults might be used in the
suggested technique to appropriately store the data by using the rotational shift operation and the random
properties of the encrypted data encoded by the Advanced Encryption Standard (AES). The suggested method's
energy usage is much lower than that of other previously presented approaches because of its straightforward
hardware implementation. The error correction code (ECC) and error correction pointer (ECP) are two more
error correction techniques that may be used in conjunction with this one. The suggested approach is put into
practice in a main memory system based on phase-change memory (PCM) and contrasted with three errortolerating
techniques in order to determine its effectiveness. The findings show that the suggested approach
provides 82% energy savings over the state-of-the-art technique for a stuck-at fault incidence rate of 10−2 and
an uncorrected bit error rate of 2 × 10−3. More broadly, we demonstrate that the fault coverage of the suggested
approach is comparable to the state-of-the-art method using a simulation analysis methodology.