Energy-Efficient Wide Range Level Shifter with a Logic Error Detection Circuit

Abstract

This project aims to create an energy-efficient, wide range level shifter (LS) with a logic error detection circuit (LEDC) is proposed. The proposed LS is designed based on a current mirror- based LS (CMLS), and a feedback pFET is added to solve the static current, which is a limitation of the CMLS. Similarly, Wilson’s CMLS (WCMLS) solves the problem of the CMLS through the feedback pFET, however, it cannot convert low supply voltage (VDDL) to high supply voltage (VDDH) fully due to the feedback pFET. In contrast, the proposed LS can convert VDDL to full VDDH using the LEDC. To verify the performance between the proposed LS and the previously proposed LS, the post layout simulation was performed using the 32-nm finFET model.